Conventional methods of forming integrated circuit devices may include steps to form single and/or dual damascene structures using copper (Cu) as an electrical interconnect material. As illustrated by FIG. 1, a conventional dual-damascene copper wiring interconnect structure may be formed by patterning a first copper wiring pattern 12 within a first dielectric layer 10, which is disposed on a semiconductor substrate (not shown). This first dielectric layer 10 may be formed as a porous SiCOH layer having a relatively low dielectric constant, which supports low capacitive coupling between adjacent conductive layers and patterns (not shown). This first copper wiring pattern 12 may be covered by an electrically insulating capping layer 14, which may be formed as a SiCN layer. An adhesion layer 16 is also formed on the capping layer 14. This adhesion layer 16, which may also be referred to as a graded layer, is typically formed of a material having a strong adhesion strength, a low susceptibility to arching and undercutting (during processing) and a strong resistance to moisture absorption. An inter-metal dielectric (IMD) layer 18 is formed on the adhesion layer 16, as illustrated. This IMD layer 18 may also be formed of a material having a relatively low dielectric constant. This IMD layer 18 may then be patterned (once or multiple times) to define an opening therein that exposes an upper surface of the first copper wiring pattern 12. Conventional techniques may then be used to fill the opening with a second copper wiring pattern, which includes a copper plug/via 20a and a patterned copper wiring layer 20b thereon.
As will be understood by those skilled in the art, via yield degradation (VYD) within interconnect structures may increase in response to copper void formation within the copper plug/via 20a. These voids, which may form during processing, may be a byproduct of undercutting 22 of the adhesion layer 16 at an interface between a sidewall of the adhesion layer 16 and the copper plug/via 20a. According to additional theories, the occurrence of VYD may be related to an outgassing of moisture from the adhesion layer 16 during back-end processing steps.